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mmx.h
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1/*
2 * mmx.h
3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher
4 *
5 * This file is part of FFmpeg.
6 *
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21#ifndef AVCODEC_X86_MMX_H
22#define AVCODEC_X86_MMX_H
23
24/*
25 * The type of an value that fits in an MMX register (note that long
26 * long constant values MUST be suffixed by LL and unsigned long long
27 * values by ULL, lest they be truncated by the compiler)
28 */
29
30/* Note: moved uq to be first so we can initialize with ULL
31 * in C++11 code without narrowing complaints or use of gcc
32 * extensions. -- Daniel Kristjansson 2012-12-13
33 */
34
35// NOLINTBEGIN(modernize-avoid-c-arrays)
36union mmx_t {
37 unsigned long long uq; /* Unsigned Quadword */
38 long long q; /* Quadword (64-bit) value */
39 int d[2]; /* 2 Doubleword (32-bit) values */
40 unsigned int ud[2]; /* 2 Unsigned Doubleword */
41 short w[4]; /* 4 Word (16-bit) values */
42 unsigned short uw[4]; /* 4 Unsigned Word */
43 char b[8]; /* 8 Byte (8-bit) values */
44 unsigned char ub[8]; /* 8 Unsigned Byte */
45 float s[2]; /* Single-precision (32-bit) value */
46}; /* On an 8-byte (64-bit) boundary */
47// NOLINTEND(modernize-avoid-c-arrays)
48
49
50#define mmx_i2r(op,imm,reg) \
51 __asm__ volatile (#op " %0, %%" #reg \
52 : /* nothing */ \
53 : "i" (imm) )
54
55#define mmx_a2r(op,a_off,a_reg,reg) \
56 __asm__ __volatile__ (#op " " #a_off "(%0), %%" #reg \
57 : /* nothing */ \
58 : "r" (a_reg))
59
60#define mmx_m2r(op,mem,reg) \
61 __asm__ volatile (#op " %0, %%" #reg \
62 : /* nothing */ \
63 : "m" (mem))
64
65#define mmx_a2r(op,a_off,a_reg,reg) \
66 __asm__ __volatile__ (#op " " #a_off "(%0), %%" #reg \
67 : /* nothing */ \
68 : "r" (a_reg))
69
70#define mmx_r2m(op,reg,mem) \
71 __asm__ volatile (#op " %%" #reg ", %0" \
72 : "=m" (mem) \
73 : /* nothing */ )
74
75#define mmx_r2a(op,reg,a_off,a_reg) \
76 __asm__ __volatile__ (#op " %%" #reg ", " #a_off "(%0)" \
77 : /* nothing */ \
78 : "r"(a_reg))
79
80#define mmx_r2r(op,regs,regd) \
81 __asm__ volatile (#op " %" #regs ", %" #regd)
82
83
84#define emms() __asm__ volatile ("emms")
85
86#define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
87#define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
88#define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
89#define movd_v2r(var,reg) __asm__ __volatile__ ("movd %0, %%" #reg \
90 : /* nothing */ \
91 : "rm" (var))
92#define movd_r2v(reg,var) __asm__ __volatile__ ("movd %%" #reg ", %0" \
93 : "=rm" (var) \
94 : /* nothing */ )
95
96#define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
97#define movq_a2r(off,var,reg) mmx_a2r (movq, off, var, reg)
98#define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
99#define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
100#define movq_r2a(reg,off,var) mmx_r2a (movq, reg, off, var)
101
102#define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
103#define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
104#define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
105#define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
106
107#define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
108#define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
109
110#define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
111#define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
112#define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
113#define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
114#define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
115#define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
116
117#define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
118#define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
119#define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
120#define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
121
122#define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
123#define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
124#define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
125#define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
126
127#define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
128#define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
129
130#define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
131#define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
132
133#define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
134#define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
135#define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
136#define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
137#define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
138#define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
139
140#define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
141#define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
142#define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
143#define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
144#define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
145#define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
146
147#define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
148#define pmaddwd_a2r(of,var,reg) mmx_a2r (pmaddwd, of, var, reg)
149#define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
150
151#define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
152#define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
153
154#define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
155#define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
156
157#define por_m2r(var,reg) mmx_m2r (por, var, reg)
158#define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
159
160#define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
161#define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
162#define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
163#define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
164#define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
165#define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
166#define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
167#define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
168#define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
169
170#define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
171#define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
172#define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
173#define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
174#define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
175#define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
176
177#define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
178#define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
179#define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
180#define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
181#define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
182#define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
183#define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
184#define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
185#define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
186
187#define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
188#define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
189#define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
190#define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
191#define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
192#define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
193
194#define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
195#define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
196#define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
197#define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
198
199#define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
200#define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
201#define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
202#define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
203
204#define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
205#define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
206#define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
207#define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
208#define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
209#define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
210
211#define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
212#define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
213#define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
214#define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
215#define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
216#define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
217
218#define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
219#define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
220
221
222/* 3DNOW extensions */
223
224#define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
225#define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
226
227
228/* AMD MMX extensions - also available in intel SSE */
229
230
231#define mmx_m2ri(op,mem,reg,imm) \
232 __asm__ volatile (#op " %1, %0, %%" #reg \
233 : /* nothing */ \
234 : "m" (mem), "i" (imm))
235#define mmx_r2ri(op,regs,regd,imm) \
236 __asm__ volatile (#op " %0, %%" #regs ", %%" #regd \
237 : /* nothing */ \
238 : "i" (imm) )
239
240#define mmx_fetch(mem,hint) \
241 __asm__ volatile ("prefetch" #hint " %0" \
242 : /* nothing */ \
243 : "m" (mem))
244
245
246#define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
247
248#define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
249
250#define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
251#define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
252#define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
253#define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
254
255#define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
256
257#define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
258
259#define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
260#define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
261
262#define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
263#define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
264
265#define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
266#define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
267
268#define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
269#define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
270
271#define pmovmskb(mmreg,reg) \
272 __asm__ volatile ("movmskps %" #mmreg ", %" #reg)
273
274#define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
275#define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
276
277#define prefetcht0(mem) mmx_fetch (mem, t0)
278#define prefetcht1(mem) mmx_fetch (mem, t1)
279#define prefetcht2(mem) mmx_fetch (mem, t2)
280#define prefetchnta(mem) mmx_fetch (mem, nta)
281
282#define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
283#define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
284
285#define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
286#define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
287
288#define sfence() __asm__ volatile ("sfence\n\t")
289
290/* SSE2 */
291#define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm)
292#define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm)
293#define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm)
294#define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm)
295
296#define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm)
297
298#define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg)
299#define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var)
300#define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd)
301#define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg)
302#define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var)
303#define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd)
304
305#define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var)
306
307#define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg)
308#define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg)
309
310#define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd)
311#define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd)
312
313#endif /* AVCODEC_X86_MMX_H */
Definition: mmx.h:36
unsigned int ud[2]
Definition: mmx.h:40
unsigned short uw[4]
Definition: mmx.h:42
short w[4]
Definition: mmx.h:41
long long q
Definition: mmx.h:38
unsigned char ub[8]
Definition: mmx.h:44
float s[2]
Definition: mmx.h:45
char b[8]
Definition: mmx.h:43
unsigned long long uq
Definition: mmx.h:37
int d[2]
Definition: mmx.h:39