MythTV master
mmx.h
Go to the documentation of this file.
1/*
2 * mmx.h
3 * Copyright (C) 1997-2001 H. Dietz and R. Fisher
4 *
5 * This file is part of FFmpeg.
6 *
7 * FFmpeg is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU Lesser General Public
9 * License as published by the Free Software Foundation; either
10 * version 2.1 of the License, or (at your option) any later version.
11 *
12 * FFmpeg is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * Lesser General Public License for more details.
16 *
17 * You should have received a copy of the GNU Lesser General Public
18 * License along with FFmpeg; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21#ifndef AVCODEC_X86_MMX_H
22#define AVCODEC_X86_MMX_H
23
24/*
25 * The type of an value that fits in an MMX register (note that long
26 * long constant values MUST be suffixed by LL and unsigned long long
27 * values by ULL, lest they be truncated by the compiler)
28 */
29
30/* Note: moved uq to be first so we can initialize with ULL
31 * in C++11 code without narrowing complaints or use of gcc
32 * extensions. -- Daniel Kristjansson 2012-12-13
33 */
34
35union mmx_t {
36 unsigned long long uq; /* Unsigned Quadword */
37 long long q; /* Quadword (64-bit) value */
38 int d[2]; /* 2 Doubleword (32-bit) values */
39 unsigned int ud[2]; /* 2 Unsigned Doubleword */
40 short w[4]; /* 4 Word (16-bit) values */
41 unsigned short uw[4]; /* 4 Unsigned Word */
42 char b[8]; /* 8 Byte (8-bit) values */
43 unsigned char ub[8]; /* 8 Unsigned Byte */
44 float s[2]; /* Single-precision (32-bit) value */
45}; /* On an 8-byte (64-bit) boundary */
46
47
48#define mmx_i2r(op,imm,reg) \
49 __asm__ volatile (#op " %0, %%" #reg \
50 : /* nothing */ \
51 : "i" (imm) )
52
53#define mmx_a2r(op,a_off,a_reg,reg) \
54 __asm__ __volatile__ (#op " " #a_off "(%0), %%" #reg \
55 : /* nothing */ \
56 : "r" (a_reg))
57
58#define mmx_m2r(op,mem,reg) \
59 __asm__ volatile (#op " %0, %%" #reg \
60 : /* nothing */ \
61 : "m" (mem))
62
63#define mmx_a2r(op,a_off,a_reg,reg) \
64 __asm__ __volatile__ (#op " " #a_off "(%0), %%" #reg \
65 : /* nothing */ \
66 : "r" (a_reg))
67
68#define mmx_r2m(op,reg,mem) \
69 __asm__ volatile (#op " %%" #reg ", %0" \
70 : "=m" (mem) \
71 : /* nothing */ )
72
73#define mmx_r2a(op,reg,a_off,a_reg) \
74 __asm__ __volatile__ (#op " %%" #reg ", " #a_off "(%0)" \
75 : /* nothing */ \
76 : "r"(a_reg))
77
78#define mmx_r2r(op,regs,regd) \
79 __asm__ volatile (#op " %" #regs ", %" #regd)
80
81
82#define emms() __asm__ volatile ("emms")
83
84#define movd_m2r(var,reg) mmx_m2r (movd, var, reg)
85#define movd_r2m(reg,var) mmx_r2m (movd, reg, var)
86#define movd_r2r(regs,regd) mmx_r2r (movd, regs, regd)
87#define movd_v2r(var,reg) __asm__ __volatile__ ("movd %0, %%" #reg \
88 : /* nothing */ \
89 : "rm" (var))
90#define movd_r2v(reg,var) __asm__ __volatile__ ("movd %%" #reg ", %0" \
91 : "=rm" (var) \
92 : /* nothing */ )
93
94#define movq_m2r(var,reg) mmx_m2r (movq, var, reg)
95#define movq_a2r(off,var,reg) mmx_a2r (movq, off, var, reg)
96#define movq_r2m(reg,var) mmx_r2m (movq, reg, var)
97#define movq_r2r(regs,regd) mmx_r2r (movq, regs, regd)
98#define movq_r2a(reg,off,var) mmx_r2a (movq, reg, off, var)
99
100#define packssdw_m2r(var,reg) mmx_m2r (packssdw, var, reg)
101#define packssdw_r2r(regs,regd) mmx_r2r (packssdw, regs, regd)
102#define packsswb_m2r(var,reg) mmx_m2r (packsswb, var, reg)
103#define packsswb_r2r(regs,regd) mmx_r2r (packsswb, regs, regd)
104
105#define packuswb_m2r(var,reg) mmx_m2r (packuswb, var, reg)
106#define packuswb_r2r(regs,regd) mmx_r2r (packuswb, regs, regd)
107
108#define paddb_m2r(var,reg) mmx_m2r (paddb, var, reg)
109#define paddb_r2r(regs,regd) mmx_r2r (paddb, regs, regd)
110#define paddd_m2r(var,reg) mmx_m2r (paddd, var, reg)
111#define paddd_r2r(regs,regd) mmx_r2r (paddd, regs, regd)
112#define paddw_m2r(var,reg) mmx_m2r (paddw, var, reg)
113#define paddw_r2r(regs,regd) mmx_r2r (paddw, regs, regd)
114
115#define paddsb_m2r(var,reg) mmx_m2r (paddsb, var, reg)
116#define paddsb_r2r(regs,regd) mmx_r2r (paddsb, regs, regd)
117#define paddsw_m2r(var,reg) mmx_m2r (paddsw, var, reg)
118#define paddsw_r2r(regs,regd) mmx_r2r (paddsw, regs, regd)
119
120#define paddusb_m2r(var,reg) mmx_m2r (paddusb, var, reg)
121#define paddusb_r2r(regs,regd) mmx_r2r (paddusb, regs, regd)
122#define paddusw_m2r(var,reg) mmx_m2r (paddusw, var, reg)
123#define paddusw_r2r(regs,regd) mmx_r2r (paddusw, regs, regd)
124
125#define pand_m2r(var,reg) mmx_m2r (pand, var, reg)
126#define pand_r2r(regs,regd) mmx_r2r (pand, regs, regd)
127
128#define pandn_m2r(var,reg) mmx_m2r (pandn, var, reg)
129#define pandn_r2r(regs,regd) mmx_r2r (pandn, regs, regd)
130
131#define pcmpeqb_m2r(var,reg) mmx_m2r (pcmpeqb, var, reg)
132#define pcmpeqb_r2r(regs,regd) mmx_r2r (pcmpeqb, regs, regd)
133#define pcmpeqd_m2r(var,reg) mmx_m2r (pcmpeqd, var, reg)
134#define pcmpeqd_r2r(regs,regd) mmx_r2r (pcmpeqd, regs, regd)
135#define pcmpeqw_m2r(var,reg) mmx_m2r (pcmpeqw, var, reg)
136#define pcmpeqw_r2r(regs,regd) mmx_r2r (pcmpeqw, regs, regd)
137
138#define pcmpgtb_m2r(var,reg) mmx_m2r (pcmpgtb, var, reg)
139#define pcmpgtb_r2r(regs,regd) mmx_r2r (pcmpgtb, regs, regd)
140#define pcmpgtd_m2r(var,reg) mmx_m2r (pcmpgtd, var, reg)
141#define pcmpgtd_r2r(regs,regd) mmx_r2r (pcmpgtd, regs, regd)
142#define pcmpgtw_m2r(var,reg) mmx_m2r (pcmpgtw, var, reg)
143#define pcmpgtw_r2r(regs,regd) mmx_r2r (pcmpgtw, regs, regd)
144
145#define pmaddwd_m2r(var,reg) mmx_m2r (pmaddwd, var, reg)
146#define pmaddwd_a2r(of,var,reg) mmx_a2r (pmaddwd, of, var, reg)
147#define pmaddwd_r2r(regs,regd) mmx_r2r (pmaddwd, regs, regd)
148
149#define pmulhw_m2r(var,reg) mmx_m2r (pmulhw, var, reg)
150#define pmulhw_r2r(regs,regd) mmx_r2r (pmulhw, regs, regd)
151
152#define pmullw_m2r(var,reg) mmx_m2r (pmullw, var, reg)
153#define pmullw_r2r(regs,regd) mmx_r2r (pmullw, regs, regd)
154
155#define por_m2r(var,reg) mmx_m2r (por, var, reg)
156#define por_r2r(regs,regd) mmx_r2r (por, regs, regd)
157
158#define pslld_i2r(imm,reg) mmx_i2r (pslld, imm, reg)
159#define pslld_m2r(var,reg) mmx_m2r (pslld, var, reg)
160#define pslld_r2r(regs,regd) mmx_r2r (pslld, regs, regd)
161#define psllq_i2r(imm,reg) mmx_i2r (psllq, imm, reg)
162#define psllq_m2r(var,reg) mmx_m2r (psllq, var, reg)
163#define psllq_r2r(regs,regd) mmx_r2r (psllq, regs, regd)
164#define psllw_i2r(imm,reg) mmx_i2r (psllw, imm, reg)
165#define psllw_m2r(var,reg) mmx_m2r (psllw, var, reg)
166#define psllw_r2r(regs,regd) mmx_r2r (psllw, regs, regd)
167
168#define psrad_i2r(imm,reg) mmx_i2r (psrad, imm, reg)
169#define psrad_m2r(var,reg) mmx_m2r (psrad, var, reg)
170#define psrad_r2r(regs,regd) mmx_r2r (psrad, regs, regd)
171#define psraw_i2r(imm,reg) mmx_i2r (psraw, imm, reg)
172#define psraw_m2r(var,reg) mmx_m2r (psraw, var, reg)
173#define psraw_r2r(regs,regd) mmx_r2r (psraw, regs, regd)
174
175#define psrld_i2r(imm,reg) mmx_i2r (psrld, imm, reg)
176#define psrld_m2r(var,reg) mmx_m2r (psrld, var, reg)
177#define psrld_r2r(regs,regd) mmx_r2r (psrld, regs, regd)
178#define psrlq_i2r(imm,reg) mmx_i2r (psrlq, imm, reg)
179#define psrlq_m2r(var,reg) mmx_m2r (psrlq, var, reg)
180#define psrlq_r2r(regs,regd) mmx_r2r (psrlq, regs, regd)
181#define psrlw_i2r(imm,reg) mmx_i2r (psrlw, imm, reg)
182#define psrlw_m2r(var,reg) mmx_m2r (psrlw, var, reg)
183#define psrlw_r2r(regs,regd) mmx_r2r (psrlw, regs, regd)
184
185#define psubb_m2r(var,reg) mmx_m2r (psubb, var, reg)
186#define psubb_r2r(regs,regd) mmx_r2r (psubb, regs, regd)
187#define psubd_m2r(var,reg) mmx_m2r (psubd, var, reg)
188#define psubd_r2r(regs,regd) mmx_r2r (psubd, regs, regd)
189#define psubw_m2r(var,reg) mmx_m2r (psubw, var, reg)
190#define psubw_r2r(regs,regd) mmx_r2r (psubw, regs, regd)
191
192#define psubsb_m2r(var,reg) mmx_m2r (psubsb, var, reg)
193#define psubsb_r2r(regs,regd) mmx_r2r (psubsb, regs, regd)
194#define psubsw_m2r(var,reg) mmx_m2r (psubsw, var, reg)
195#define psubsw_r2r(regs,regd) mmx_r2r (psubsw, regs, regd)
196
197#define psubusb_m2r(var,reg) mmx_m2r (psubusb, var, reg)
198#define psubusb_r2r(regs,regd) mmx_r2r (psubusb, regs, regd)
199#define psubusw_m2r(var,reg) mmx_m2r (psubusw, var, reg)
200#define psubusw_r2r(regs,regd) mmx_r2r (psubusw, regs, regd)
201
202#define punpckhbw_m2r(var,reg) mmx_m2r (punpckhbw, var, reg)
203#define punpckhbw_r2r(regs,regd) mmx_r2r (punpckhbw, regs, regd)
204#define punpckhdq_m2r(var,reg) mmx_m2r (punpckhdq, var, reg)
205#define punpckhdq_r2r(regs,regd) mmx_r2r (punpckhdq, regs, regd)
206#define punpckhwd_m2r(var,reg) mmx_m2r (punpckhwd, var, reg)
207#define punpckhwd_r2r(regs,regd) mmx_r2r (punpckhwd, regs, regd)
208
209#define punpcklbw_m2r(var,reg) mmx_m2r (punpcklbw, var, reg)
210#define punpcklbw_r2r(regs,regd) mmx_r2r (punpcklbw, regs, regd)
211#define punpckldq_m2r(var,reg) mmx_m2r (punpckldq, var, reg)
212#define punpckldq_r2r(regs,regd) mmx_r2r (punpckldq, regs, regd)
213#define punpcklwd_m2r(var,reg) mmx_m2r (punpcklwd, var, reg)
214#define punpcklwd_r2r(regs,regd) mmx_r2r (punpcklwd, regs, regd)
215
216#define pxor_m2r(var,reg) mmx_m2r (pxor, var, reg)
217#define pxor_r2r(regs,regd) mmx_r2r (pxor, regs, regd)
218
219
220/* 3DNOW extensions */
221
222#define pavgusb_m2r(var,reg) mmx_m2r (pavgusb, var, reg)
223#define pavgusb_r2r(regs,regd) mmx_r2r (pavgusb, regs, regd)
224
225
226/* AMD MMX extensions - also available in intel SSE */
227
228
229#define mmx_m2ri(op,mem,reg,imm) \
230 __asm__ volatile (#op " %1, %0, %%" #reg \
231 : /* nothing */ \
232 : "m" (mem), "i" (imm))
233#define mmx_r2ri(op,regs,regd,imm) \
234 __asm__ volatile (#op " %0, %%" #regs ", %%" #regd \
235 : /* nothing */ \
236 : "i" (imm) )
237
238#define mmx_fetch(mem,hint) \
239 __asm__ volatile ("prefetch" #hint " %0" \
240 : /* nothing */ \
241 : "m" (mem))
242
243
244#define maskmovq(regs,maskreg) mmx_r2ri (maskmovq, regs, maskreg)
245
246#define movntq_r2m(mmreg,var) mmx_r2m (movntq, mmreg, var)
247
248#define pavgb_m2r(var,reg) mmx_m2r (pavgb, var, reg)
249#define pavgb_r2r(regs,regd) mmx_r2r (pavgb, regs, regd)
250#define pavgw_m2r(var,reg) mmx_m2r (pavgw, var, reg)
251#define pavgw_r2r(regs,regd) mmx_r2r (pavgw, regs, regd)
252
253#define pextrw_r2r(mmreg,reg,imm) mmx_r2ri (pextrw, mmreg, reg, imm)
254
255#define pinsrw_r2r(reg,mmreg,imm) mmx_r2ri (pinsrw, reg, mmreg, imm)
256
257#define pmaxsw_m2r(var,reg) mmx_m2r (pmaxsw, var, reg)
258#define pmaxsw_r2r(regs,regd) mmx_r2r (pmaxsw, regs, regd)
259
260#define pmaxub_m2r(var,reg) mmx_m2r (pmaxub, var, reg)
261#define pmaxub_r2r(regs,regd) mmx_r2r (pmaxub, regs, regd)
262
263#define pminsw_m2r(var,reg) mmx_m2r (pminsw, var, reg)
264#define pminsw_r2r(regs,regd) mmx_r2r (pminsw, regs, regd)
265
266#define pminub_m2r(var,reg) mmx_m2r (pminub, var, reg)
267#define pminub_r2r(regs,regd) mmx_r2r (pminub, regs, regd)
268
269#define pmovmskb(mmreg,reg) \
270 __asm__ volatile ("movmskps %" #mmreg ", %" #reg)
271
272#define pmulhuw_m2r(var,reg) mmx_m2r (pmulhuw, var, reg)
273#define pmulhuw_r2r(regs,regd) mmx_r2r (pmulhuw, regs, regd)
274
275#define prefetcht0(mem) mmx_fetch (mem, t0)
276#define prefetcht1(mem) mmx_fetch (mem, t1)
277#define prefetcht2(mem) mmx_fetch (mem, t2)
278#define prefetchnta(mem) mmx_fetch (mem, nta)
279
280#define psadbw_m2r(var,reg) mmx_m2r (psadbw, var, reg)
281#define psadbw_r2r(regs,regd) mmx_r2r (psadbw, regs, regd)
282
283#define pshufw_m2r(var,reg,imm) mmx_m2ri(pshufw, var, reg, imm)
284#define pshufw_r2r(regs,regd,imm) mmx_r2ri(pshufw, regs, regd, imm)
285
286#define sfence() __asm__ volatile ("sfence\n\t")
287
288/* SSE2 */
289#define pshufhw_m2r(var,reg,imm) mmx_m2ri(pshufhw, var, reg, imm)
290#define pshufhw_r2r(regs,regd,imm) mmx_r2ri(pshufhw, regs, regd, imm)
291#define pshuflw_m2r(var,reg,imm) mmx_m2ri(pshuflw, var, reg, imm)
292#define pshuflw_r2r(regs,regd,imm) mmx_r2ri(pshuflw, regs, regd, imm)
293
294#define pshufd_r2r(regs,regd,imm) mmx_r2ri(pshufd, regs, regd, imm)
295
296#define movdqa_m2r(var,reg) mmx_m2r (movdqa, var, reg)
297#define movdqa_r2m(reg,var) mmx_r2m (movdqa, reg, var)
298#define movdqa_r2r(regs,regd) mmx_r2r (movdqa, regs, regd)
299#define movdqu_m2r(var,reg) mmx_m2r (movdqu, var, reg)
300#define movdqu_r2m(reg,var) mmx_r2m (movdqu, reg, var)
301#define movdqu_r2r(regs,regd) mmx_r2r (movdqu, regs, regd)
302
303#define pmullw_r2m(reg,var) mmx_r2m (pmullw, reg, var)
304
305#define pslldq_i2r(imm,reg) mmx_i2r (pslldq, imm, reg)
306#define psrldq_i2r(imm,reg) mmx_i2r (psrldq, imm, reg)
307
308#define punpcklqdq_r2r(regs,regd) mmx_r2r (punpcklqdq, regs, regd)
309#define punpckhqdq_r2r(regs,regd) mmx_r2r (punpckhqdq, regs, regd)
310
311#endif /* AVCODEC_X86_MMX_H */
Definition: mmx.h:35
unsigned int ud[2]
Definition: mmx.h:39
unsigned short uw[4]
Definition: mmx.h:41
short w[4]
Definition: mmx.h:40
long long q
Definition: mmx.h:37
unsigned char ub[8]
Definition: mmx.h:43
float s[2]
Definition: mmx.h:44
char b[8]
Definition: mmx.h:42
unsigned long long uq
Definition: mmx.h:36
int d[2]
Definition: mmx.h:38